1. Field of the Invention
The field of the invention is data processing, or, more specifically, methods, apparatus, and products for managing concurrent serialized interrupt broadcast commands in a multi-node, symmetric multiprocessing computer.
2. Description of Related Art
Contemporary high performance computer systems, such as, for example, the IBM System z series of mainframes, are typically implemented as multi-node, symmetric multiprocessing (‘SMP’) computers with many compute nodes. SMP is a multiprocessor computer hardware architecture where two or more, typically many more, identical processors are connected to a single shared main memory and controlled by a single operating system. Most multiprocessor systems today use an SMP architecture. In the case of multi-core processors, the SMP architecture applies to the cores, treating them as separate processors. Processors may be interconnected using buses, crossbar switches, mesh networks, and the like. Each compute node typically includes a number of processors, each of which has at least some local memory, at least some of which is accelerated with cache memory. The cache memory can be local to each processor, local to a compute node shared across more than one processor, or shared across nodes.
Conventional SMP computers typically include inter-processor communications to facilitate the coordination of interrupt processing amongst processors. In such conventional SMP computers, there exists a network between compute nodes and their processors to broadcast commands to execute such interrupt processing. These broadcast commands for interrupt processing must be serviced by at least one processor on each node in the serial order in which these commands they were broadcast. There is, however, no requirement that these commands be serviced simultaneously. To ensure that these broadcast commands are serviced by at least one processor in each node in serial order, conventional SMP computers reject all other broadcast commands for interrupt processing while any such command is being serviced by any of the nodes. Such rejection continues until each node confirms that it has completed servicing the last broadcast command for interrupt processing and is ready to execute another such command. As the number of processors and compute nodes in SMP computers continues to increase, the volume of such broadcast commands for interrupt processing also increases and therefore the latency caused by rejecting all broadcasts while currently servicing interrupt processing also increases.